邏輯設計與實驗
Logic Design and Lab
| 節 | 週二 |
|---|---|
3 10:10–11:00 | 邏輯設計與實驗 ED713（光復） 2 節連堂 |
4 11:10–12:00 | |
A 18:30–19:20 | 邏輯設計與實驗 ED713（光復） 2 節連堂 |
B 19:30–20:20 |
* 根據陽明交大上課時間表所列
1. Digital systems and switching circuits Binary Arithmetic 2. Combinational logic principles: Boolean algebra, postulates and theorems, truth table, Boolean function, and circuit minimization,simplifications 3. Combinational logic practices: addition\subtraction, multiplexers\demultiplexers, encoders\decoders, multiplier and read-only-memory 4. Sequential logic: D latch, S-R flip flop, J-K flip flop, D flip flop, T flip flop up/down counters and registers 5. Finite state machine Moore machine and Mealey machine 6. Sequential logic practices: Arithmetic logic unit, instruction set, addressing and memories 課程網站: 140.113.144.123
No
無備註
助教 : 柯俊先,高一弘
1. Exams: Midterm- 30% Final- 35% 2. Quiz,Homework, projects:- 35%
教師未提供此項資料
教師未提供此項資料
Fundamental of Logic Design, 5th edition Charles H. Roth Jr.
- 地點
- ED832
- 時間
- Tue 3:30 ~ 5:00
- 聯絡方式
- by email