實體設計自動化
Physical Design Automation
| 節 | 週一 |
|---|---|
5 13:20–14:10 | 實體設計自動化 EO103（光復） 3 節連堂 |
6 14:20–15:10 | |
7 15:30–16:20 |
* 根據陽明交大上課時間表所列
VLSI design is now recognized as an important area of Computer/Electrical Engineering and Computer Science. Due to the complicated process, the design of a VLSI system is unthinkable without the use of numerous computer-aided design (CAD) tools, which automate most of the design tasks. This course discusses the basic concepts of so-called "backend" design automation tools and introduces some current trends in designing VLSI/SoC. Students who take this course will learn a lot of EDA materials and will have a chance to use modern commercial backend tools. Hard work on programming is expected.
Data Structures (Algorithms or Discrete Math.) and VLSI Design
無備註
教師未提供此項資料
Programming labs 70-80% Final exam 20-30%
教師未提供此項資料
| 週次 | 主題 |
|---|---|
| 第 1 週 | Introduction |
| 第 2 週 | Fundamental algorithms for physical design automation |
| 第 3 週 | Fundamental algorithms for physical design automation |
| 第 4 週 | Partitioning |
| 第 5 週 | Partitioning |
| 第 6 週 | Floorplanning |
| 第 7 週 | Floorplanning |
| 第 8 週 | Placement |
| 第 9 週 | Placement |
| 第 10 週 | Placement |
| 第 11 週 | Routing |
| 第 12 週 | Routing |
| 第 13 週 | Routing |
| 第 14 週 | Design closure and DFM |
| 第 15 週 | Design closure and DFM |
| 第 16 週 | Final exam |
Ref: Electronic Design Automation by Wang, Chang, and Cheng
- 地點
- EF369
- 時間
- By appointment
- 聯絡方式
- mphlin@nycu.edu.tw