模式化通訊IC設計
Model-based Communication IC Design
| 節 | 週二 |
|---|---|
5 13:20–14:10 | 模式化通訊IC設計 ED713（光復） 3 節連堂 |
6 14:20–15:10 | |
7 15:30–16:20 |
* 根據陽明交大上課時間表所列
This course introduces a model-based design and fast-prototyping flow provided by Mathworks. A digital transceiver is used as a design example and related algorithms, and architectures will be taught. Finally, a series of experiments that let you learn how the communication IC is designed and prototyped will be conducted. After taking this course, students should be able to – write hardware description language (HDL) programs, – design hardware architectures for IC implementation, – use the model-based design flow provided by Mathworks to design communication ICs, – use Xilinx Zynq 7000/AD9361 SDR platform for experiment, and – understand the operation of a fundamental digital transceiver.
Logic Design; C / Matlab Programming; Communication Theory
無備註
Course materials will be provided on the E3 system.
In-class practice: 15% Homework: 20% Midterm: 20% Final: 25% Project: 20%
教師未提供此項資料
| 週次 | 主題 |
|---|---|
| 第 1 週 | Introduction |
| 第 2 週 | Introduction to VHDL |
| 第 3 週 | Concurrent sequential processing |
| 第 4 週 | Data type suprogram and attributes |
| 第 5 週 | Introduction to Simulink |
| 第 6 週 | Code generation |
| 第 7 週 | Fixed point implementation |
| 第 8 週 | Midterm Exam |
| 第 9 週 | Bineary number representation |
| 第 10 週 | Finite state machine |
| 第 11 週 | Trigonometric function computation |
| 第 12 週 | Timing recovery |
| 第 13 週 | Carrier recovery |
| 第 14 週 | Introduction to Zedboard |
| 第 15 週 | FPGA implementation |
| 第 16 週 | Final Exam |
Self-compiled notes / handouts
- 地點
- ED907
- 時間
- Tue. 10-12 am; Thu. 10-12am
- 聯絡方式
- ymchen@nycu.edu.tw